Scheduling computation and communication on a software-defined photonic Network-on-Chip architecture for high-performance real-time systems

Temucin H., İMRE K. M.

JOURNAL OF SYSTEMS ARCHITECTURE, vol.90, pp.54-71, 2018 (SCI-Expanded) identifier identifier

  • Publication Type: Article / Article
  • Volume: 90
  • Publication Date: 2018
  • Doi Number: 10.1016/j.sysarc.2018.07.007
  • Journal Indexes: Science Citation Index Expanded (SCI-EXPANDED), Scopus
  • Page Numbers: pp.54-71
  • Keywords: Parallel computer architecture, Photonic networks, Routing, Software defined network, Optical circuit switching, Real-time systems, Cyclic executive scheduling, FUTURE GENERATIONS, MULTIPROCESSORS, PLATFORMS, DESIGN, ROUTER
  • Gazi University Affiliated: No


This paper presents a novel scheduling approach that efficiently schedules the computational and the communicational resources of a Software-Defined Photonic Network-on-Chip (SD-PNoC) Architecture designed for high-performance real-time systems. The proposed scheduling approach extends the conventional cyclic executive scheduling algorithm from the one that schedules solely the computational resources into a general one that schedules both the computational and the communicational resources together in a synchronized manner. The proposed SD-PNoC architecture employs Software Defined Network (SDN) approach by using application specific conflict-free and contention-free communication patterns to solve the routing and wavelength assignment (RWA) problem exists in photonic networks. The implementations of the collective communication primitives such as broadcast and all-to-broadcast are also presented to demonstrate the system as a whole.