The temperature dependence of forward and reverse bias capacitance-voltage (C-V) and conductance-voltage (G/w-V) characteristics of Au/n-InP Schottky barrier diodes (SBDs) have been investigated in the temperature range of 80-400 K at 1 MHz. Evaluation of these experimental data reveals a peak due to series resistance in the accumulation region, and these peak positions shift toward positive bias voltage with increasing temperature. Also a negative capacitance effects has been observed in these structure. This phenomenon can be explained by considering the loss of interface charge at occupied states below Fermi level due to impact ionization. The temperature dependent C-V, G/w-V and DLTS characteristics confirm that the R(s), N(ss), trap levels play an important role and strongly affect the electrical parameters of Au/n-InP SBDs. Investigation of deep level nature in Au/n-InP structure have been carried out with Sula DLTS compact system. Evaluation of two trap levels have been compared with literature.